I am a doctoral student at the Max Planck Institute for Software Systems (MPI-SWS) working in the Real-Time Systems group led by Björn Brandenburg.
I completed my undergraduate studies in Computer Science at the Jawaharlal Nehru Technological University in Hyderabad, India (2006 - 2010). Following this, I worked as a Linux kernel developer at CERN (2011 - 2012) in the Hardware and Timing section of the Beam Controls group. I worked with open-hardware timing systems for large-scale distributed real-time systems (designs of which are openly available at the Open Hardware Repository). I am currently a Linux kernel maintainer for the VME subsystem.
I organized an OS Reading Group at MPI-SWS for two years between 2013 and 2014, and maintain a reading list here for those interested in this area of research.
I am broadly interested in real-time systems, operating systems, distributed systems and embedded systems. I am particularly interested in the design of robust operating systems.
Conference and Workshop Papers
“Supporting Low-Latency, Low-Criticality Tasks in a Certified Mixed-Criticality OS”, Proceedings of the 25th International Conference on Real-Time Networks and Systems (RTNS 2017), October 2017.
“TimerShield: Protecting High-Priority Tasks from Low-Priority Timer Interference”, Proceedings of the 23rd IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2017), April 2017. Best Paper Award.
“Fast on Average, Predictable in the Worst Case: Exploring Real-Time Futexes in LITMUSRT”, Proceedings of the 35th IEEE Real-Time Systems Symposium (RTSS 2014), pp. 96-105, December 2014.
“Scaling Global Scheduling with Message Passing”, Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2014), pp. 263-274, April 2014.
“Free and Open Source Software at CERN: Integration of Drivers in the Linux Kernel”, 13th International Conference on Accelerator and Large Experimental Physics Control Systems (ICALEPCS 2011)
Technical Reports and Other Publications
“FlaRe: Efficient Capability Semantics for Timely Processor Access”, Manuscript, October 2013
“Self-Describing Bus (SDB) Specification for Logic Cores - Version 1.0”, Technical Report, CERN
You can find me in room 608 at the MPI-SWS building in Kaiserslautern.
Mailing Address: MPI-SWS Paul-Ehrlich-Straße G 26 D-67663 Kaiserslautern Germany Email: mvanga -at- mpi-sws -dot- org Phone: +49 681 9303-8411 Skype: mvanga